The research of the VLSI Information Processing (VIP) group is at the intersection of wireless communication, digital signal processing (DSP), and very-large-scale integration (VLSI) circuit and system design. Our main focus is on developing novel algorithms for applications demanding high throughput, low latency, and best solution quality, and integrating them into efficient (in terms of power consumption, throughput, and silicon area) application-specific integrated circuits (ASICs) and field-programmable gate arrays (FPGAs). To arrive at best-in-class hardware designs, we are jointly considering communication and information theory, signal processing, algorithm development, architecture design, and hardware implementation aspects, which enables far more efficient solutions than conventional, atomistic DSP or VLSI design approaches that solely focus on one of the two fields. Our current research focus is on theory, algorithms, and VLSI circuits for low-precision massive (or large-scale) multi-user multiple-input multiple-output (MU-MIMO) wireless systems, analog-to-feature (A2F) conversion for low-power signal classification, (non-)convex optimization for real-time signal recovery from nonlinear measurements (including phase retrieval problems), as well as machine learning in the realms of wireless system design. In all of these fields, we build upon recent progress in convex and non-convex optimization, sparse signal recovery and compressive sensing, graphical models, Bayesian inference, dimensionality reduction, and manifold learning.